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DATE
2006
IEEE
147views Hardware» more  DATE 2006»
16 years 18 days ago
Quantitative analysis of transaction level models for the AMBA bus
The increasing complexity of embedded systems pushes system designers to higher levels of abstraction. Transaction Level Modeling (TLM) has been proposed to model ation in systems...
Gunar Schirner, Rainer Dömer
EMSOFT
2005
Springer
16 years 2 days ago
A structural approach to quasi-static schedulability analysis of communicating concurrent programs
We describe a system as a set of communicating concurrent programs. Quasi-static scheduling compiles the concurrent programs into a sequential one. It uses a Petri net as an inter...
Cong Liu, Alex Kondratyev, Yosinori Watanabe, Albe...
DAC
2000
ACM
16 years 7 months ago
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications...
Hartej Singh, Guangming Lu, Eliseu M. Chaves Filho...
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
16 years 28 days ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
GECCO
2004
Springer
145views Optimization» more  GECCO 2004»
15 years 12 months ago
Search Based Automatic Test-Data Generation at an Architectural Level
Abstract. The need for effective testing techniques for architectural level descriptions is widely recognised. However, due to the variety of domain-specific architectural descript...
Yuan Zhan, John A. Clark