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TC
2008
15 years 6 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
ISSTA
2006
ACM
16 years 15 days ago
Towards an architectural approach for the dynamic and automatic composition of software components
In a component-based software system the components are specified, designed and implemented with the intention to be reused, and are assembled in various contexts in order to pro...
Antonio Bucchiarone, Andrea Polini, Patrizio Pelli...
RTCSA
2009
IEEE
16 years 1 months ago
Branch Target Buffers: WCET Analysis Framework and Timing Predictability
—One step in the verification of hard real-time systems is to determine upper bounds on the worst-case execution times (WCET) of tasks. To obtain tight bounds, a WCET analysis h...
Daniel Grund, Jan Reineke, Gernot Gebhard
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
15 years 11 months ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
FPL
1995
Springer
106views Hardware» more  FPL 1995»
15 years 10 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...