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CODES
2001
IEEE
15 years 10 months ago
Towards effective embedded processors in codesigns: customizable partitioned caches
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
Peter Petrov, Alex Orailoglu
EIT
2008
IEEE
15 years 8 months ago
Design and analysis of efficient reconfigurable wavelet filters
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
Amit Pande, Joseph Zambreno
ICSE
1993
IEEE-ACM
15 years 10 months ago
Formal Approaches to Software Architecture
Over the past 15 years there has been increasing recognition that careful attention to the design of a system’s software architecture is critical to satisfying its requirements ...
David Garlan
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
16 years 28 days ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
P2P
2006
IEEE
16 years 14 days ago
Cost-Based Analysis of Hierarchical DHT Design
Flat DHT architectures have been the main focus of the research on DHT design so far. However, there have been also a number of works proposing hierarchical DHT organizations and ...
Stefan Zöls, Zoran Despotovic, Wolfgang Kelle...