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ISSS
1999
IEEE
131views Hardware» more  ISSS 1999»
15 years 10 months ago
Compressed Code Execution on DSP Architectures
Decreasing the program size has become an important goal in the design of embedded systems target to mass production. This problem has led to a number of efforts aimed at designin...
Paulo Centoducatte, Ricardo Pannain, Guido Araujo
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
16 years 23 days ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
DAC
2001
ACM
16 years 7 months ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey
DAC
2010
ACM
15 years 10 months ago
Performance yield-driven task allocation and scheduling for MPSoCs under process variation
With the ever-increasing transistor variability in CMOS technology, it is essential to integrate variation-aware performance analysis into the task allocation and scheduling proce...
Lin Huang, Qiang Xu
FPGA
2006
ACM
92views FPGA» more  FPGA 2006»
15 years 10 months ago
Embedded floating-point units in FPGAs
Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications. However, it is this nonspecific nature that has limited t...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...