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TASE
2007
IEEE
16 years 20 days ago
Realizing Live Sequence Charts in SystemVerilog
The design of an embedded control system starts with an investigation of properties and behaviors of the process evolving within its environment, and an analysis of the requiremen...
Hai H. Wang, Shengchao Qin, Jun Sun 0001, Jin Song...
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
16 years 14 days ago
Performance analysis of greedy shapers in real-time systems
— Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these...
Ernesto Wandeler, Alexander Maxiaguine, Lothar Thi...
ISORC
2006
IEEE
16 years 13 days ago
Diagnostic Framework for Integrated Time-Triggered Architectures
Integrated architectures promise substantial technical and economic benefits in the development of distributed embedded real-time systems. In the context of diagnosis new diagnos...
Philipp Peti, Roman Obermaisser
CODES
2005
IEEE
15 years 8 months ago
Implementation of dynamic streaming Applications on heterogeneous multi-Processor architectures
System design based on static task graphs does not match well with modern consumer electronic devices with dynamic stream processing applications. We propose the TTL API for task ...
Tomas Henriksson, Jeffrey Kang, Pieter van der Wol...
ICSE
1999
IEEE-ACM
15 years 10 months ago
Experience with Performing Architecture Tradeoff Analysis
Software architectures, like complex designs in any field, embody tradeoffs made by the designers. However, these tradeoffs are not always made explicitly by the designers and the...
Rick Kazman, Mario Barbacci, Mark Klein, S. Jeromy...