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TC
2008
15 years 6 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
MST
2002
152views more  MST 2002»
15 years 6 months ago
Average-Case Analysis of Greedy Packet Scheduling
We study the average number of delays suffered by packets routed using greedy (work conserving) scheduling policies. We obtain tight bounds on the worst-case average number of del...
Zvi Lotker, Boaz Patt-Shamir
INFOCOM
2010
IEEE
15 years 4 months ago
Password Strength: An Empirical Analysis
—It is a well known fact that user-chosen passwords are somewhat predictable: by using tools such as dictionaries or probabilistic models, attackers and password recovery tools c...
Matteo Dell'Amico, Pietro Michiardi, Yves Roudier
INFOCOM
2010
IEEE
15 years 4 months ago
Queuing Analysis in Multichannel Cognitive Spectrum Access: A Large Deviation Approach
Abstract—The queueing performance of a (secondary) cognitive user is investigated for a hierarchical network where there are N independent and identical primary users. Each prima...
Amine Laourine, Shiyao Chen, Lang Tong
TCOM
2010
130views more  TCOM 2010»
15 years 4 months ago
On modeling, analysis, and optimization of packet aggregation systems
Abstract—In packet communication systems, a header is attached to the transmitted packet at each layer. The overhead due to the transmission of the individual header can have a s...
Jung Ha Hong, Khosrow Sohraby