103 search results - page 18 / 21 » Analysis and Hardware Architecture Design of Global Motion E... |
191
click to vote
ISSS
1995
IEEE
15 years 9 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
182
click to vote
DAC
2002
ACM
16 years 7 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
153
click to vote
ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
158
click to vote
DAC
2004
ACM
16 years 7 months ago
2004
ACM
A tool that automates the floating-point to fixed-point conversion (FFC) process for digital signal processing systems is described. The tool automatically optimizes fixed-point d...
161
click to vote
ASPLOS
1992
ACM
15 years 10 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...