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FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
16 years 21 days ago
Variation-aware routing for FPGAs
Chip design in the nanometer regime is becoming increasingly difficult due to process variations. ASIC designers have adopted statistical optimization techniques to mitigate the e...
Satish Sivaswamy, Kia Bazargan
USENIX
2003
15 years 7 months ago
X Window System Network Performance
Performance was an important issue in the development of X from the initial protocol design and continues to be important in modern application and extension development. That X i...
Keith Packard, James Gettys
ISQED
2006
IEEE
94views Hardware» more  ISQED 2006»
16 years 16 days ago
System-Level SRAM Yield Enhancement
It is well known that SRAM constitutes a large portion of modern integrated circuits, with 80% or more of the total transistors being dedicated to SRAM in a typical processor or S...
Fadi J. Kurdahi, Ahmed M. Eltawil, Young-Hwan Park...
DAC
2008
ACM
16 years 7 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
SCANGIS
2003
15 years 7 months ago
Routing Using Geospatial Information System Analysis
A prototype least cost pipeline routing was performed using various data and GIS analysis. Ahvaz-Marun oil pipeline in south west of IRAN was chosen for development of the prototy...
Mahmoud Reza Delavar, Fereydoon Naghibi