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ASPDAC
2007
ACM
152views Hardware» more  ASPDAC 2007»
15 years 10 months ago
A Graph Reduction Approach to Symbolic Circuit Analysis
A new graph reduction approach to symbolic circuit analysis is developed in this paper. A Binary Decision Diagram (BDD) mechanism is formulated, together with a specially designed ...
Guoyong Shi, Weiwei Chen, C.-J. Richard Shi
ENTCS
2008
152views more  ENTCS 2008»
15 years 6 months ago
Augur 2 - A New Version of a Tool for the Analysis of Graph Transformation Systems
We describe the design and the present state of the verification tool Augur 2 which is currently being developed. It is based on Augur 1, a tool which can analyze graph transforma...
Barbara König, Vitali Kozioura
SERP
2004
15 years 7 months ago
Design and Evaluation of an Automated Aspect Mining Tool
Attention to aspect oriented programming (AOP) is rapidly growing as its benefits in large software system development and maintenance are increasingly recognized. However, existin...
David Shepherd, Emily Gibson, Lori L. Pollock
FECS
2006
107views Education» more  FECS 2006»
15 years 7 months ago
Software Quality Through Requirement and Design
- One of the major areas of software engineering, as specified in the SWEBOK (SoftWare Engineering Body Of Knowledge) [1], is software quality. This paper presents an argument on w...
Massood Towhidnejad
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
16 years 3 months ago
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
Anirudh Devgan, Chandramouli V. Kashyap