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» Analog circuit test based on a digital signature
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VTS
2003
IEEE
87views Hardware» more  VTS 2003»
15 years 11 months ago
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits
We present a novel analog checker that adjusts dynamically the error threshold to the magnitude of its input signals. We demonstrate that this property is crucial for accurate con...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
VTS
2002
IEEE
162views Hardware» more  VTS 2002»
15 years 11 months ago
Self-Testing Second-Order Delta-Sigma Modulators Using Digital Stimulus
Single-bit second-order delta-sigma modulators are commonly used in high-resolution ADCs. Testing this type of modulator requires a high-resolution test stimulus, which is diffic...
Chee-Kian Ong, Kwang-Ting (Tim) Cheng
ASPDAC
2004
ACM
85views Hardware» more  ASPDAC 2004»
15 years 9 months ago
Multi-level placement with circuit schema based clustering in analog IC layouts
This paper aims at developing an automated device-level placement for analog circuit design which achieves comparable quality to manual designs by experts. It extracts a set of cl...
Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Sh...
ISCAS
2006
IEEE
90views Hardware» more  ISCAS 2006»
16 years 2 days ago
Phase measurement and adjustment of digital signals using random sampling technique
—This paper introduces a technique to measure and adjust the relative phase of on-chip high speed digital signals using a random sampling technique of inferential statistics. The...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
ISPD
2005
ACM
239views Hardware» more  ISPD 2005»
15 years 11 months ago
Mapping algorithm for large-scale field programmable analog array
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. With thes...
I. Faik Baskaya, Sasank Reddy, Sung Kyu Lim, Tyson...