189 search results - page 25 / 38 » An ultra-fast instruction set simulator |
176
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ICMCS
2006
IEEE
16 years 3 days ago
2006
IEEE
The MISP Processor is a programmable media processor which supports multi-issuing, multi-threading and stream processing techniques. MISP executes applications that have been mapp...
157
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ESTIMEDIA
2004
Springer
15 years 11 months ago
2004
Springer
Abstract—Few analytical performance models that relate performance figure of merit to architectural design decisions are reported in recent studies of network-on-chip, which pre...
146
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has d...
153
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HPCA
2003
IEEE
16 years 6 months ago
2003
IEEE
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
151
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CODES
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents an automatic method to customize embedded application-specific instruction processors (ASIPs) based on compiler analysis. ASIPs, also known as embedded soft c...