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ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
15 years 11 months ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik
ISLPED
1996
ACM
91views Hardware» more  ISLPED 1996»
15 years 11 months ago
Energy minimization using multiple supply voltages
We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling pro...
Jui-Ming Chang, Massoud Pedram
166
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PODC
2010
ACM
15 years 10 months ago
Brief announcement: exponential speed-up of local algorithms using non-local communication
We demonstrate how to leverage a system’s capability for allto-all communication to achieve an exponential speed-up of local algorithms despite bandwidth and memory restrictions...
Christoph Lenzen, Roger Wattenhofer
ASPDAC
2004
ACM
113views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Area-minimal algorithm for LUT-based FPGA technology mapping with duplication-free restriction
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...
Chi-Chou Kao, Yen-Tai Lai
CIAC
2006
Springer
103views Algorithms» more  CIAC 2006»
15 years 10 months ago
Provisioning a Virtual Private Network Under the Presence of Non-communicating Groups
Virtual private network design in the hose model deals with the reservation of capacities in a weighted graph such that the terminals in this network can communicate with one anoth...
Friedrich Eisenbrand, Edda Happ