3120 search results - page 77 / 624 » An optimal architecture for a DDC |
165
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IPPS
2007
IEEE
16 years 14 days ago
2007
IEEE
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
131
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
Late CMOS scaling reduces device reliability, and existing work has studied the permanent SER (soft error rate) for configuration memory in FPGA extensively. In this paper, we sh...
202
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MOMPES
2009
IEEE
16 years 24 days ago
2009
IEEE
For embedded systems quality requirements are equally if not even more important than functional requirements. The foundation for the fulfillment of these quality requirements ha...
154
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CAINE
2006
15 years 7 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
147
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IJCAI
1993
15 years 7 months ago
1993
Since its inception, arti cial intelligence has relied upon a theoretical foundation centred around perfect rationality as the desired property of intelligent systems. We argue, a...