3120 search results - page 55 / 624 » An optimal architecture for a DDC |
151
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GECCO
2008
Springer
15 years 7 months ago
2008
Springer
In this paper we present a swarm grammar system that makes use of bio-inspired mechanisms of reproduction, communication and construction in order to build three-dimensional struc...
164
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ISCA
2006
IEEE
15 years 6 months ago
2006
IEEE
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
149
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TWC
2008
15 years 6 months ago
2008
Abstract-- The V-BLAST (vertical Bell Labs layered Space-Time) architecture involves independent coding/decoding per antenna (layer) with equal rate and power per antenna and a fix...
158
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ASPLOS
1989
ACM
15 years 10 months ago
1989
ACM
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
159
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INTEGRATION
2007
15 years 6 months ago
2007
The Data Encryption Standard (DES) is a cipher that is still used in a broad range of applications, from smartcards, where it is often implemented as a tamperresistant embedded co...