Sciweavers

3120 search results - page 526 / 624
» An optimal architecture for a DDC
Sort
View
DAC
2002
ACM
16 years 7 months ago
An energy saving strategy based on adaptive loop parallelization
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
Ismail Kadayif, Mahmut T. Kandemir, Mustafa Karak&...
DAC
2002
ACM
16 years 7 months ago
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans
We extend in this paper the concept of the P-admissible floorplan representation to that of the P*-admissible one. A P*-admissible representation can model the most general floorp...
Jai-Ming Lin, Yao-Wen Chang
DAC
2002
ACM
16 years 7 months ago
Watermarking integer linear programming solutions
Linear programming (LP) in its many forms has proven to be an indispensable tool for expressing and solving optimization problems in numerous domains. We propose the first set of ...
Seapahn Megerian, Milenko Drinic, Miodrag Potkonja...
DAC
2002
ACM
16 years 7 months ago
A flexible accelerator for layer 7 networking applications
In this paper, we present a flexible accelerator designed for networking applications. The accelerator can be utilized efficiently by a variety of Network Processor designs. Most ...
Gokhan Memik, William H. Mangione-Smith
DAC
2003
ACM
16 years 7 months ago
Distributed sleep transistor network for power reduction
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
Changbo Long, Lei He