3120 search results - page 516 / 624 » An optimal architecture for a DDC |
170
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
173
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their performance, functionality, and hence, complexity. Simultaneously, relentless s...
182
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TC
2010
15 years 4 months ago
2010
—Superpeer architectures exploit the heterogeneity of nodes in a peer-to-peer (P2P) network by assigning additional responsibilities to higher capacity nodes. In the design of a ...
183
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CONEXT
2010
ACM
15 years 4 months ago
2010
ACM
Fundamental limitations of traditional data center network architectures have led to the development of architectures that provide enormous bisection bandwidth for up to hundreds ...
154
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Intrinsic and parasitic capacitances play an important role in determining the high?frequency RF performance of devices. Recently, a new type of carbon nanotube field effect trans...