3120 search results - page 512 / 624 » An optimal architecture for a DDC |
161
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
169
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EDBT
2009
ACM
16 years 1 months ago
2009
ACM
Business Intelligence (BI) refers to technologies, tools, and practices for collecting, integrating, analyzing, and presenting large volumes of information to enable better decisi...
161
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ISCA
2009
IEEE
16 years 29 days ago
2009
IEEE
Analysis of technology and application trends reveals a growing imbalance in the peak compute-to-memory-capacity ratio for future servers. At the same time, the fraction contribut...
191
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ISCA
2009
IEEE
16 years 29 days ago
2009
IEEE
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
159
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EMSOFT
2009
Springer
16 years 27 days ago
2009
Springer
An important step in model-based embedded system design consists in mapping functional specifications and their tasks/operations onto execution architectures and their ressources...