Sciweavers

3120 search results - page 359 / 624
» An optimal architecture for a DDC
Sort
View
RSP
1999
IEEE
160views Control Systems» more  RSP 1999»
15 years 11 months ago
Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping
SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The ...
Oliver Bringmann, Wolfgang Rosenstiel, Annette Mut...
SSDBM
1999
IEEE
113views Database» more  SSDBM 1999»
15 years 11 months ago
Multidimensional Indexing and Query Coordination for Tertiary Storage Management
In many scientific domains, experimental devices or simulation programs generate large volumes of data. The volumes of data may reach hundreds of terabytes and therefore it is imp...
Arie Shoshani, Luis M. Bernardo, Henrik Nordberg, ...
FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
15 years 11 months ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
HYBRID
1999
Springer
15 years 11 months ago
Path Planning and Flight Controller Scheduling for an Autonomous Helicopter
Abstract. In this article we investigate how to generate flight trajectories for an autonomous helicopter. The planning strategy that we propose reflects the controller architect...
Magnus Egerstedt, Tak-John Koo, Frank Hoffmann, Sh...
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 11 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...