3120 search results - page 358 / 624 » An optimal architecture for a DDC |
187
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SBCCI
2009
ACM
15 years 11 months ago
2009
ACM
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
235
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PODS
2002
ACM
16 years 7 months ago
2002
ACM
We consider the fundamental operation of applying a conjunction of selection conditions to a set of records. With large main memories available cheaply, systems may choose to keep...
198
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...
166
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
Branch mispredictions can have a major performance impact on high-performance processors. Multipath execution has recently been introduced to help limit the misprediction penaltie...
196
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MICRO
1999
IEEE
15 years 11 months ago
1999
IEEE
Compressing the instructions of an embedded program is important for cost-sensitive low-power control-oriented embedded computing. A number of compression schemes have been propos...