3120 search results - page 353 / 624 » An optimal architecture for a DDC |
162
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
204
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PDP
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
164
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FPGA
2009
ACM
16 years 1 months ago
2009
ACM
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
216
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ICPP
2009
IEEE
16 years 1 months ago
2009
IEEE
—Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architec...
272
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HPDC
2008
IEEE
16 years 1 months ago
2008
IEEE
The emergence of heterogeneous many core architectures presents a unique opportunity for delivering order of magnitude performance increases to high performance applications by ma...