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» An optimal architecture for a DDC
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DATE
2005
IEEE
180views Hardware» more  DATE 2005»
16 years 14 days ago
A Coprocessor for Accelerating Visual Information Processing
Visual information processing will play an increasingly important role in future electronics systems. In many applications, e.g. video surveillance cameras, data throughput of mic...
Walter Stechele, L. Alvado Cárcel, Stephan ...
194
Voted
ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
16 years 9 days ago
Compiler based exploration of DSP energy savings by SIMD operations
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
Markus Lorenz, Peter Marwedel, Thorsten Dräge...
CIA
2004
Springer
16 years 8 days ago
Reasoning About Communication - A Practical Approach Based on Empirical Semantics
Given a specification of communication rules in a multiagent system (in the form of protocols, ACL semantics, etc.), the question of how to design appropriate agents that can oper...
Felix A. Fischer, Michael Rovatsos
193
Voted
SAC
2005
ACM
16 years 13 days ago
Performance analysis framework for large software-intensive systems with a message passing paradigm
The launch of new features for mobile phones is increasing and the product life cycle symmetrically decreasing in duration as higher levels of sophistication are reached. Therefor...
Christian Del Rosso
193
Voted
LCTRTS
2007
Springer
16 years 1 months ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...