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» An optimal architecture for a DDC
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ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel
EUROPAR
2000
Springer
15 years 10 months ago
BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations
We present a compiler algorithm called BitValue, which can discover both unused and constant bits in dusty-deck C programs. BitValue uses forward and backward dataflow analyses, ge...
Mihai Budiu, Majd Sakr, Kip Walker, Seth Copen Gol...
FMCAD
2000
Springer
15 years 10 months ago
Visualizing System Factorizations with Behavior Tables
Abstract. Behavior tables are a design formalization intended to support interactive design derivation for hardware and embedded systems. It is a reformulation of the DDD transform...
Alex Tsow, Steven D. Johnson
FPL
2000
Springer
77views Hardware» more  FPL 2000»
15 years 10 months ago
Multiple-Wordlength Resource Binding
This paper describes a novel resource binding technique for use in multiple-wordlength systems implemented in FPGAs. It is demonstrated that the multiple-wordlength binding problem...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
MICRO
2000
IEEE
162views Hardware» more  MICRO 2000»
15 years 10 months ago
Accurate and efficient predicate analysis with binary decision diagrams
Functionality and performance of EPIC architectural features depend on extensive compiler support. Predication, one of these features, promises to reduce control flow overhead and...
John W. Sias, Wen-mei W. Hwu, David I. August