3120 search results - page 306 / 624 » An optimal architecture for a DDC |
178
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FCCM
2009
IEEE
15 years 10 months ago
2009
IEEE
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
184
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ICANN
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents a novel system that performs text-independent speaker authentication using new spiking neural network (SNN) architectures. Each speaker is represented by a set ...
158
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ASAP
2004
IEEE
15 years 10 months ago
2004
IEEE
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...
199
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CASES
2004
ACM
15 years 10 months ago
2004
ACM
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
214
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
A strong level of trust in the software running on an embedded processor is a prerequisite for its widespread deployment in any high-risk system. The expanding field of software p...