3120 search results - page 304 / 624 » An optimal architecture for a DDC |
178
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WOSP
2010
ACM
15 years 11 months ago
2010
ACM
The architecture of a software system has a significant impact on its quality of service (QoS) as measured by several performance metrics such as execution time, availability, th...
192
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ASPDAC
1998
ACM
15 years 11 months ago
1998
ACM
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...
185
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FPGA
1998
ACM
15 years 11 months ago
1998
ACM
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
180
Voted
IPPS
1997
IEEE
15 years 11 months ago
1997
IEEE
Barrier synchronization is a crucial operation for parallel systems. Many schemes have been proposed in the literature to achieve fast barrier synchronization through software, ha...
166
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ISSS
1997
IEEE
15 years 11 months ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...