3120 search results - page 295 / 624 » An optimal architecture for a DDC |
196
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ICS
2005
Tsinghua U.
16 years 8 days ago
2005
Tsinghua U.
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...
178
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IPSN
2004
Springer
16 years 4 days ago
2004
Springer
We study network capacity limits and optimal routing algorithms for regular sensor networks, namely, square and torus grid sensor networks, in both, the static case (no node failu...
180
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
174
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
We obtain analytically, the energy optimal speed profile of a generic multi-speed device with a discrete set of speeds, to execute a given task within a given time. Current implem...
233
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PPOPP
2009
ACM
16 years 7 months ago
2009
ACM
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...