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» An optimal architecture for a DDC
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ICIP
1995
IEEE
16 years 8 months ago
Parallel computation of sequential pixel updates in statistical tomographic reconstruction
While Bayesian methods can significantly improve the quality of tomographic reconstructions, they require the solution of large iterative optimization problems. Recent results ind...
Ken D. Sauer, S. Borman, Charles A. Bouman
DAC
2008
ACM
16 years 7 months ago
The mixed signal optimum energy point: voltage and parallelism
An energy optimization is proposed that addresses the nontrivial digital contribution to power and impact on performance in high-speed mixed-signal circuits. Parallel energy and b...
Brian P. Ginsburg, Anantha P. Chandrakasan
DAC
2008
ACM
16 years 7 months ago
Predictive design space exploration using genetically programmed response surfaces
Exponential increases in architectural design complexity threaten to make traditional processor design optimization techniques intractable. Genetically programmed response surface...
Henry Cook, Kevin Skadron
DAC
2010
ACM
15 years 10 months ago
PreDVS: preemptive dynamic voltage scaling for real-time systems using approximation scheme
System optimization techniques based on dynamic voltage scaling (DVS) are widely used with the aim of reducing processor energy consumption. Inter-task DVS assigns the same voltag...
Weixun Wang, Prabhat Mishra
CF
2006
ACM
15 years 10 months ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao