3120 search results - page 268 / 624 » An optimal architecture for a DDC |
203
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
181
Voted
HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
195
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CHI
2005
ACM
16 years 7 months ago
2005
ACM
The Intelligence Analyst (IA) community will soon be the designated users of many new software tools. In the multitasking world of the IA, any one tool cannot be permitted to gree...
189
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VLSID
2007
IEEE
16 years 7 months ago
2007
IEEE
Leakage power is becoming a dominant contributor to the total power consumption and dual-Vth assignment is an efficient technique to decrease leakage power, for which effective de...
180
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NETCOOP
2009
Springer
16 years 1 months ago
2009
Springer
There are moves in the Internet architecture community to add multipath capabilities to TCP, so that end-systems will be able to shift their traffic away from congested parts of th...