3120 search results - page 263 / 624 » An optimal architecture for a DDC |
164
Voted
HPCA
2008
IEEE
16 years 7 months ago
2008
IEEE
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...
156
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MOBIHOC
2008
ACM
16 years 6 months ago
2008
ACM
Recently, cooperative communications, in the form of keeping each node with a single antenna and having a node exploit a relay node's antenna, is shown to be a promising appr...
165
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ICCD
2008
IEEE
16 years 3 months ago
2008
IEEE
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
173
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ICCAD
2001
IEEE
16 years 3 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
188
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CGO
2010
IEEE
16 years 1 months ago
2010
IEEE
Reducing the arithmetic precision of a computation has real performance implications, including increased speed, decreased power consumption, and a smaller memory footprint. For s...