3120 search results - page 262 / 624 » An optimal architecture for a DDC |
178
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DAC
2005
ACM
16 years 7 months ago
2005
ACM
This paper presents the first in-depth study on applying dual Vdd buffers to buffer insertion and multi-sink buffered tree construction for power minimization under delay constrai...
196
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowl...
127
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Antenna effect may damage gate oxides during plasma-based fabrication process. The antenna ratio of total exposed antenna area to total gate oxide area is directly related to the ...
161
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WWW
2005
ACM
16 years 7 months ago
2005
ACM
We propose a set of optimization techniques, collectively called Wireless SOAP (WSOAP), to compress SOAP messages transmitted across a wireless link. The Name Space Equivalency te...
188
Voted
VLSID
2002
IEEE
16 years 7 months ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...