3120 search results - page 248 / 624 » An optimal architecture for a DDC |
156
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MSE
2003
IEEE
15 years 12 months ago
2003
IEEE
This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of...
182
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PPOPP
2009
ACM
16 years 7 months ago
2009
ACM
The advent of new parallel architectures has increased the need for parallel optimizing compilers to assist developers in creating efficient code. OpenUH is a state-of-the-art opt...
185
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SASP
2009
IEEE
16 years 1 months ago
2009
IEEE
—With the appearance of massively parallel and inexpensive platforms such as the G80 generation of NVIDIA GPUs, more real-life applications will be designed or ported to these pl...
168
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ICDE
2000
IEEE
15 years 11 months ago
2000
IEEE
We consider an architecture of mediators and wrappers for Internet accessible WebSources of limited query capability. Each call to a source is a WebSource Implementation (WSI) and...
146
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TCAD
2002
15 years 6 months ago
2002
Abstract--In this paper, we study wire width planning for interconnect performance optimization in an interconnect-centric design flow. We first propose some simplified, yet near-o...