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CGO
2003
IEEE
15 years 12 months ago
Dynamic Binary Translation for Accumulator-Oriented Architectures
A dynamic binary translation system for a co-designed virtual machine is described and evaluated. The underlying hardware directly executes an accumulator-oriented instruction set...
Ho-Seop Kim, James E. Smith
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 11 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
GLOBECOM
2010
IEEE
15 years 4 months ago
Space-Time Shift Keying: A Unified MIMO Architecture
In this paper, we propose a novel Space-Time Shift Keying (STSK) modulation scheme for MIMO communication systems, where the concept of spatial modulation is extended to include bo...
Shinya Sugiura, Sheng Chen, Lajos Hanzo
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
16 years 8 days ago
An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
Rui Rodrigues, João M. P. Cardoso
ARITH
1999
IEEE
15 years 11 months ago
Montgomery Modular Exponentiation on Reconfigurable Hardware
It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are...
Thomas Blum