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ISPASS
2010
IEEE
16 years 1 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
CHES
2000
Springer
167views Cryptology» more  CHES 2000»
15 years 11 months ago
A High Performance Reconfigurable Elliptic Curve Processor for GF(2m)
This work proposes a processor architecture for elliptic curves cryptosystems over fields GF(2m ). This is a scalable architecture in terms of area and speed that exploits the abil...
Gerardo Orlando, Christof Paar
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
15 years 11 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
JHSN
2000
112views more  JHSN 2000»
15 years 6 months ago
A hierarchical Quality of Service control architecture for configurable multimedia applications
In order to achieve the best application-level Quality-of-Service (QoS), multimedia applications need to be dynamically tuned and reconfigured to adapt to fluctuating computing an...
Baochun Li, William Kalter, Klara Nahrstedt
IPPS
2010
IEEE
15 years 4 months ago
Acceleration of spiking neural networks in emerging multi-core and GPU architectures
Recently, there has been strong interest in large-scale simulations of biological spiking neural networks (SNN) to model the human brain mechanisms and capture its inference capabi...
Mohammad A. Bhuiyan, Vivek K. Pallipuram, Melissa ...