3120 search results - page 185 / 624 » An optimal architecture for a DDC |
149
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PIMRC
2008
IEEE
16 years 28 days ago
2008
IEEE
Abstract—The Media Independent Handover (MIH) architecture is designed to facilitate the signaling and enable seamless handovers in heterogeneous networks. In this paper, we prop...
157
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ISVLSI
2006
IEEE
16 years 17 days ago
2006
IEEE
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
236
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NAA
2004
Springer
15 years 12 months ago
2004
Springer
In this paper, we develop a probabilistic model for estimation of the numbers of cache misses during the sparse matrix-vector multiplication (for both general and symmetric matrice...
175
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ANCS
2009
ACM
15 years 4 months ago
2009
ACM
Torus, mesh, and flattened butterfly networks have all been considered as candidate architectures for on-chip interconnection networks. In this paper, we study the problem of opti...
248
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SIGMOD
2006
ACM
16 years 6 months ago
2006
ACM
The networking and distributed systems communities have recently explored a variety of new network architectures, both for applicationlevel overlay networks, and as prototypes for...