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DATE
2006
IEEE
140views Hardware» more  DATE 2006»
16 years 18 days ago
Optimization of regular expression pattern matching circuits on FPGA
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang,...
APCSAC
2005
IEEE
16 years 5 days ago
Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures
Increasing microprocessor vulnerability to soft errors induced by neutron and alpha particle strikes prevents aggressive scaling and integration of transistors in future technologi...
Jie Hu, Greg M. Link, Johnsy K. John, Shuai Wang, ...
DFT
1999
IEEE
131views VLSI» more  DFT 1999»
15 years 11 months ago
Optimal Vector Selection for Low Power BIST
In the last decade, researchers have devoted increasing efforts to reduce the average power consumption in VLSI systems during normal operation mode, while power consumption durin...
Fulvio Corno, Matteo Sonza Reorda, Maurizio Rebaud...
VLSID
2001
IEEE
200views VLSI» more  VLSID 2001»
16 years 7 months ago
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
MTV
2005
IEEE
81views Hardware» more  MTV 2005»
16 years 3 days ago
Search-Space Optimizations for High-Level ATPG
Our mutation based validation paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently identify and analyze the architec...
Jorge Campos, Hussain Al-Asaad