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» An optimal architecture for a DDC
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DAC
2006
ACM
16 years 15 days ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
CODES
2005
IEEE
16 years 4 days ago
Conflict analysis in multiprocess synthesis for optimized system integration
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
Oliver Bringmann, Wolfgang Rosenstiel, Axel Sieben...
HPCA
2009
IEEE
16 years 7 months ago
Criticality-based optimizations for efficient load processing
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Pr...
Samantika Subramaniam, Anne Bracy, Hong Wang 0003,...
DAC
2009
ACM
16 years 1 months ago
Throughput optimal task allocation under thermal constraints for multi-core processors
It is known that temperature gradients and thermal hotspots affect the reliability of microprocessors. Temperature is also an important constraint when maximizing the performance...
Vinay Hanumaiah, Ravishankar Rao, Sarma B. K. Vrud...
SSDBM
2009
IEEE
126views Database» more  SSDBM 2009»
16 years 1 months ago
Comprehensive Optimization of Declarative Sensor Network Queries
We present a novel sensor network query processing architecture that (a) covers all the query optimization phases that are required to map a declarative query to executable code; ...
Ixent Galpin, Christian Y. A. Brenninkmeijer, Farh...