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» An optimal architecture for a DDC
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PPSN
2004
Springer
15 years 12 months ago
Coupling of Evolution and Learning to Optimize a Hierarchical Object Recognition Model
Abstract. A key problem in designing artificial neural networks for visual object recognition tasks is the proper choice of the network architecture. Evolutionary optimization met...
Georg Schneider, Heiko Wersing, Bernhard Sendhoff,...
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
16 years 6 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
ARITH
2009
IEEE
16 years 1 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
16 years 6 months ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
CASES
2009
ACM
16 years 1 months ago
Hardware evaluation of the Luffa hash family
Efficient hardware architectures for the Luffa hash algorithm are proposed in this work. We explore different tradeoffs and propose several architectures, targeting both compac...
Miroslav Knezevic, Ingrid Verbauwhede