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» An optimal architecture for a DDC
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SIGGRAPH
2010
ACM
15 years 8 months ago
Mathmorph
This paper describes the research of parametric and procedural modeling techniques associated with digital fabrication and form-finding within architectural design. The outcome of...
Ming Tabg, Jonathon Anderson
SBACPAD
2005
IEEE
139views Hardware» more  SBACPAD 2005»
15 years 12 months ago
Chained In-Order/Out-of-Order DoubleCore Architecture
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
Miquel Pericàs, Adrián Cristal, Rube...
ICYCS
2008
IEEE
16 years 25 days ago
VM-based Architecture for Network Monitoring and Analysis
A single physical machine provides multiple network monitoring and analysis services (e.g., IDS, QoS) which are installed on the same operating system. Isolation between services ...
Qiang Li, Qinfen Hao, Limin Xiao, Zhoujun Li
DSD
2009
IEEE
124views Hardware» more  DSD 2009»
16 years 1 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
CGO
2005
IEEE
16 years 1 days ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein