3120 search results - page 108 / 624 » An optimal architecture for a DDC |
195
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FPL
2006
Springer
15 years 10 months ago
2006
Springer
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony's PlayStation 2 vector units offer scope for hardware acceleration of applications. We compa...
170
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CODES
2001
IEEE
15 years 10 months ago
2001
IEEE
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
159
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
174
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
141
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EUROPAR
2008
Springer
15 years 8 months ago
2008
Springer
Performance of distributed applications largely depends on the mapping of their components on the underlying architecture. On one mponent-based approaches provide an abstraction su...