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ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
15 years 4 months ago
Managing verification error traces with bounded model debugging
Managing long verification error traces is one of the key challenges of automated debugging engines. Today, debuggers rely on the iterative logic array to model sequential behavior...
Sean Safarpour, Andreas G. Veneris, Farid N. Najm
EUSFLAT
2009
132views Fuzzy Logic» more  EUSFLAT 2009»
15 years 4 months ago
Modeling Position Specificity in Sequence Kernels by Fuzzy Equivalence Relations
This paper demonstrates that several known sequence kernels can be expressed in a unified framework in which the position specificity is modeled by fuzzy equivalence relations. In ...
Ulrich Bodenhofer, Karin Schwarzbauer, Mihaela Ion...
ECIR
2011
Springer
14 years 10 months ago
Towards Quantum-Based DB+IR Processing Based on the Principle of Polyrepresentation
The cognitively motivated principle of polyrepresentation still lacks a theoretical foundation in IR. In this work, we discuss two competing polyrepresentation frameworks that are ...
David Zellhöfer, Ingo Frommholz, Ingo Schmitt...
CAV
2012
Springer
242views Hardware» more  CAV 2012»
13 years 9 months ago
Exercises in Nonstandard Static Analysis of Hybrid Systems
Abstract. In formal verification of hybrid systems, a big challenge is to incorporate continuous flow dynamics in a discrete framework. Our previous work proposed to use nonstand...
Ichiro Hasuo, Kohei Suenaga
CSL
2009
Springer
16 years 1 months ago
Model Checking FO(R) over One-Counter Processes and beyond
Abstract. One-counter processes are pushdown processes over a singleton stack alphabet (plus a stack-bottom symbol). We study the problems of model checking asynchronous products o...
Anthony Widjaja To