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» An interconnection architecture for micropayment systems
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DAC
2001
ACM
16 years 7 months ago
A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
Haris Lekatsas, Jörg Henkel
INFOCOM
2008
IEEE
16 years 17 days ago
Cross-Layer Quality of Service Support for UWB Wireless Multimedia Sensor Networks
—Wireless Multimedia Sensor Networks (WMSNs) are networks of wirelessly interconnected devices that allow retrieving video and audio streams, still images, and scalar sensor data...
Tommaso Melodia, Ian F. Akyildiz
DATE
2006
IEEE
66views Hardware» more  DATE 2006»
16 years 6 days ago
Power/performance hardware optimization for synchronization intensive applications in MPSoCs
This paper explores optimization techniques of the synchronization mechanisms for MPSoCs based on complex interconnect (Network-on-Chip), targeted at future powerefficient system...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
MSS
2003
IEEE
93views Hardware» more  MSS 2003»
15 years 11 months ago
IP SAN - From iSCSI to IP-Addressable Ethernet Disks
The initial iSCSI products provide a means to connect FC SAN islands across IP networks. This paper describes the implementation of an IP-SAN where the disk subsystem is a virtual...
Peter Wang, Robert E. Gilligan, Henry Green, Jeff ...
SAC
2009
ACM
15 years 10 months ago
The device service bus: a solution for embedded device integration through web services
This paper presents a middleware infrastructure for integration of heterogeneous embedded devices in ubiquitous computing environments. The proposed infrastructure employs the Dev...
Gustavo Medeiros Araújo, Frank Siqueira