443 search results - page 62 / 89 » An interconnection architecture for micropayment systems |
176
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
151
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IVA
2005
Springer
15 years 11 months ago
2005
Springer
Abstract. Continuous and synchronized whole-body motions are essential for achieving believable autonomous virtual humans in interactive applications. We present a new motion contr...
156
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ICPPW
1999
IEEE
15 years 10 months ago
1999
IEEE
We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
109
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IPPS
1998
IEEE
15 years 10 months ago
1998
IEEE
Abstract. The current prototype of the Genoa Active Message MAchine GAMMA is a low-overhead, Active Messages-based inter-process communication layer implemented mainly at kernel le...
145
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IJES
2008
15 years 6 months ago
2008
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...