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» An interconnection architecture for micropayment systems
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EUROPAR
1997
Springer
15 years 10 months ago
Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets
The large latency of memory accesses is a major obstacle in obtaining high processor utilization in large scale shared-memory multiprocessors. Access to remote memory is likely to ...
Edward D. Moreno, Sergio Takeo Kofuji, Marcelo H. ...
ADHOC
2007
137views more  ADHOC 2007»
15 years 6 months ago
"MeshUp": Self-organizing mesh-based topologies for next generation radio access networks
The phenomenal growth in wireless technologies has brought about a slew of new services. Incumbent with the new technology is the challenge of providing flexible, reconfigurable...
Samik Ghosh, Kalyan Basu, Sajal K. Das
VLSID
2008
IEEE
117views VLSI» more  VLSID 2008»
16 years 6 months ago
Single Event Upset: An Embedded Tutorial
Abstract-- With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends su...
Fan Wang, Vishwani D. Agrawal
DAC
2002
ACM
16 years 7 months ago
Component-based design approach for multicore SoCs
This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitive...
Ahmed Amine Jerraya, Amer Baghdadi, Damien Lyonnar...
IPPS
1998
IEEE
15 years 10 months ago
A Configurable Computing Approach Towards Real-Time Target Tracking
Traditionally, tracking systems require dedicated hardware to handle the computational demands and input/output rates imposed by real-time video sources. An alternative presented i...
Bharadwaj Pudipeddi, A. Lynn Abbott, Peter M. Atha...