443 search results - page 2 / 89 » An interconnection architecture for micropayment systems |
152
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CDES
2006
15 years 7 months ago
2006
: As we continue miniaturization of circuits into nano-scale, interconnects have been recognized as the limiting factor for next generation of computing structures. To increase the...
141
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OTM
2009
Springer
16 years 16 days ago
2009
Springer
This paper proposes new protocols for the interconnection of FIFO- and causal-ordered broadcast systems, thus increasing their scalability. They use several interconnection links b...
156
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HPCA
2007
IEEE
16 years 9 days ago
2007
IEEE
This paper deals with alternative server memory architecture options in multicore CPU generations using optically-attached memory systems. Thanks to its large bandwidth-distance p...
168
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DATE
2000
IEEE
15 years 10 months ago
2000
IEEE
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
159
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TVLSI
2010
15 years 20 days ago
2010
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...