Major software development standards mandate the establishment of trace links among software artifacts such as requirements, architectural elements, or source code without explici...
Alexander Egyed, Stefan Biffl, Matthias Heindl, Pa...
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
Viswanathan Subramanian, Mikel Bezdek, Naga Durga ...
The middleware technology used as the foundation of Internet-enabled enterprise systems is becoming increasingly complex. In addition, the various technologies offer a number of s...
In this paper we present a new fault tolerant clock synchronization algorithm called the Fault Tolerant Daisy Chain algorithm. It is intended for internal clock synchronization of...
d Abstractions for Contract Validation Guido de Caso, Víctor Braberman, Diego Garbervetsky and Sebastián Uchitel —Pre/post condition-based specifications are common-place in a...