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ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
16 years 3 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...

Lab
1058views
16 years 3 months ago
UP Electrical and Electronics Engineering Institute
The Institute's mission is to produce excellent, innovative and nationalistic engineers and to advance the field of electrical and electronics engineering. The undergr...
ICCAD
2008
IEEE
170views Hardware» more  ICCAD 2008»
16 years 3 months ago
A polynomial time approximation scheme for timing constrained minimum cost layer assignment
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
Shiyan Hu, Zhuo Li, Charles J. Alpert
ICCAD
2007
IEEE
128views Hardware» more  ICCAD 2007»
16 years 3 months ago
Module assignment for pin-limited designs under the stacked-Vdd paradigm
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
Yong Zhan, Tianpei Zhang, Sachin S. Sapatnekar
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
16 years 3 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
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