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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
16 years 6 days ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
16 years 6 days ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
SSDBM
2005
IEEE
111views Database» more  SSDBM 2005»
16 years 6 days ago
Querying Streaming Geospatial Image Data: The GeoStreams Project
Data products generated from remotely-sensed, geospatial imagery (RSI) used in emerging areas, such as global climatology, environmental monitoring, land use, and disaster managem...
Quinn Hart, Michael Gertz
201
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ANCS
2005
ACM
16 years 5 days ago
Resource mapping and scheduling for heterogeneous network processor systems
Task to resource mapping problems are encountered during (i) hardware-software co-design and (ii) performance optimization of Network Processor systems. The goal of the first pro...
Liang Yang, Tushar Gohad, Pavel Ghosh, Devesh Sinh...
PLDI
2005
ACM
16 years 5 days ago
Jungloid mining: helping to navigate the API jungle
Reuse of existing code from class libraries and frameworks is often difficult because APIs are complex and the client code required to use the APIs can be hard to write. We obser...
David Mandelin, Lin Xu, Rastislav Bodík, Do...
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