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» An aspect-oriented generative approach
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ICCAD
2001
IEEE
102views Hardware» more  ICCAD 2001»
16 years 3 months ago
Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing
This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enabl...
Walter Daems, Georges G. E. Gielen, Willy M. C. Sa...
DATE
2006
IEEE
89views Hardware» more  DATE 2006»
16 years 18 days ago
Generation of broadside transition fault test sets that detect four-way bridging faults
Generation of n -detection test sets is typically done for a single fault model. In this work we investigate the generation of n -detection test sets by pairing each fault of a ta...
Irith Pomeranz, Sudhakar M. Reddy
DFT
2006
IEEE
82views VLSI» more  DFT 2006»
16 years 18 days ago
VLSI Implementation of a Fault-Tolerant Distributed Clock Generation
In this paper we will introduce a novel approach for the on-chip generation of a faulttolerant clock. We will motivate why it becomes more and more desirable to provide VLSI circu...
Markus Ferringer, Gottfried Fuchs, Andreas Steinin...
ISSRE
2002
IEEE
15 years 11 months ago
A Flexible Generator Architecture for Improving Software Dependability
Improving the dependability of computer systems is increasingly important as more and more of our lives depend on the availability of such systems. Wrapping dynamic link libraries...
Christof Fetzer, Zhen Xiao
FPL
2006
Springer
223views Hardware» more  FPL 2006»
15 years 10 months ago
From Equation to VHDL: Using Rewriting Logic for Automated Function Generation
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
Carlos Morra, M. Sackmann, Sunil Shukla, Jürg...