Model checking techniques are promising for automated generation of directed tests. However, due to the prohibitively large time and resource requirements, conventional model chec...
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...
Holger Ruckdeschel, Hritam Dutta, Frank Hannig, J&...
Most of today’s course generation does not allow an in-depth, generic representation of pedagogical knowledge. However, supporting individual learners with different goals requi...
In this paper we deal with the problem of building a timetable for the courses of a university faculty. We propose an integer linear programming approach based on column generation...