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ISSTA
1998
ACM
15 years 10 months ago
Automatic Test Data Generation Using Constraint Solving Techniques
Automatic test data generation leads to identify input values on which a selected point in a procedure is executed. This paper introduces a new method for this problem based on co...
Arnaud Gotlieb, Bernard Botella, Michel Rueher
VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
15 years 4 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
15 years 4 months ago
The synthesis of combinational logic to generate probabilities
As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies suc...
Weikang Qian, Marc D. Riedel, Kia Bazargan, David ...
ICCV
2005
IEEE
16 years 8 months ago
A Generative/Discriminative Learning Algorithm for Image Classification
We have developed a two-phase generative / discriminative learning procedure for the recognition of classes of objects and concepts in outdoor scenes. Our method uses both multipl...
Yi Li, Linda G. Shapiro, Jeff A. Bilmes
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
16 years 6 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...