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SAC
2002
ACM
15 years 6 months ago
Automatic code generation for executing tiled nested loops onto parallel architectures
This paper presents a novel approach for the problem of generating tiled code for nested for-loops using a tiling transformation. Tiling or supernode transformation has been widel...
Georgios I. Goumas, Maria Athanasaki, Nectarios Ko...
KBSE
2008
IEEE
16 years 23 days ago
DiffGen: Automated Regression Unit-Test Generation
— Software programs continue to evolve throughout their lifetime. Maintenance of such evolving programs, including regression testing, is one of the most expensive activities in ...
Kunal Taneja, Tao Xie
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 11 months ago
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
Vivekananda M. Vedula, Jacob A. Abraham
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
15 years 10 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee
ARTMED
1999
56views more  ARTMED 1999»
15 years 6 months ago
Refining instructional text generation after evaluation
In this paper, we describe how user-adapted explanations about drug prescriptions can be generated from already existing data sources. We start by illustrating the two-step approa...
Fiorella de Rosis, Floriana Grasso, Dianne C. Berr...